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2003 Microchip Technology Inc.
Preliminary
DS40300C-page 115
PIC16F62X
IORLW
Inclusive OR Literal with W
Syntax:
[ label ]
IORLW k
Operands:
0
≤ k ≤ 255
Operation:
(W) .OR. k
→ (W)
Status Affected:
Z
Encoding:
11
1000
kkkk
Description:
The contents of the W register is
OR’ed with the eight bit literal 'k'.
The result is placed in the W
register.
Words:
1
Cycles:
1
Example
IORLW
0x35
Before Instruction
W= 0x9A
After Instruction
W= 0xBF
Z= 0
IORWF
Inclusive OR W with f
Syntax:
[ label ]
IORWF
f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(W) .OR. (f)
→ (dest)
Status Affected:
Z
Encoding:
00
0100
dfff
ffff
Description:
Inclusive OR the W register with
register 'f'. If 'd' is 0 the result is
placed in the W register. If 'd' is
1 the result is placed back in
register 'f'.
Words:
1
Cycles:
1
Example
IORWF
REG1, 0
Before Instruction
REG1 = 0x13
W
= 0x91
After Instruction
REG1 = 0x13
W
= 0x93
Z= 1
MOVLW
Move Literal to W
Syntax:
[ label ]
MOVLW k
Operands:
0
≤ k ≤ 255
Operation:
k
→ (W)
Status Affected:
None
Encoding:
11
00xx
kkkk
Description:
The eight bit literal 'k' is loaded
into W register. The don’t cares
will assemble as 0’s.
Words:
1
Cycles:
1
Example
MOVLW
0x5A
After Instruction
W= 0x5A
MOVF
Move f
Syntax:
[ label ]
MOVF f,d
Operands:
0
≤ f ≤ 127
d
∈ [0,1]
Operation:
(f)
→ (dest)
Status Affected:
Z
Encoding:
00
1000
dfff
ffff
Description:
The contents of register f is
moved to a destination depen-
dent upon the status of d. If d =
0, destination is W register. If d
= 1, the destination is file regis-
ter f itself. d = 1 is useful to test
a file register since status flag Z
is affected.
Words:
1
Cycles:
1
Example
MOVF
REG1, 0
After Instruction
W = value in REG1 register
Z= 1
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